Japan Aerospace Exploration Agency
Japan Aerospace Exploration Agency
Japan Aerospace Exploration Agency
Japan Aerospace Exploration Agency
Japan Aerospace Exploration Agency
Japan Aerospace Exploration Agency
JAXA Research and Development Memorandum: Report of Flight Demonstration Results of the Mission Demonstration Test Satellite-1 (MDS-1; TSUBASA)
巻
JAXA-RM-03-022
ページ
518 - 521
発行年
2004-02-04
抄録(英)
Seven kinds of COTS memories were installed in Commercial Semiconductor Devices (CSD) and their single event effects were observed. Single Event Upset (SEU) and Multi-Bit Upset (MBU) were observed in DRAMs and SRAMs, and no Single Event Latchup (SEL) was observed in all memories. The results showed that most of SEU and MBU was caused by protons in Van Allen belt, and that the number of MBU was considerably large to neglect. They also showed that some of the on-orbit data were not consistent with the results obtained from the ground test. This implies that the structure of recent memories have become too small to predict accurate SEU rate by present model.