@article{oai:jaxa.repo.nii.ac.jp:00024117,
 author = {柳川, 善光 and 小林, 大輔 and 廣瀬, 和之 and 牧野, 高紘 and 齋藤, 宏文 and 池田, 博一 and 小野田, 忍 and 平尾, 敏雄 and 大島, 武 and Yanagawa, Y. and Kobayashi, Daisuke and Hirose, Kazuyuki and Makino, T. and Saito, Hirobumi and Ikeda, Hirokazu and Onoda, S. and Hirao, T. and Ohshima, T.},
 issue = {4},
 journal = {IEEE Transactions on Nuclear Science},
 month = {Aug},
 note = {資料番号: SA1000801000},
 pages = {1958--1963},
 title = {Experimental verification of scan-architecture-based evaluation technique of SET and SEU soft-error rates at each flip-flop in logic VLSI systems},
 volume = {56},
 year = {2009}
}