{"created":"2023-06-20T14:55:37.979339+00:00","id":24117,"links":{},"metadata":{"_buckets":{"deposit":"aaa83139-adef-4c77-9eb1-85732bd8dee0"},"_deposit":{"created_by":1,"id":"24117","owners":[1],"pid":{"revision_id":0,"type":"depid","value":"24117"},"status":"published"},"_oai":{"id":"oai:jaxa.repo.nii.ac.jp:00024117","sets":["1887:1888"]},"author_link":["234457","234452","234460","234451","234454","234455","234458","234456","234464","234447","234459","234453","234463","234449","234448","234461","234450","234462"],"item_7_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2009-08","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"4","bibliographicPageEnd":"1963","bibliographicPageStart":"1958","bibliographicVolumeNumber":"56","bibliographic_titles":[{},{"bibliographic_title":"IEEE Transactions on Nuclear Science","bibliographic_titleLang":"en"}]}]},"item_7_description_32":{"attribute_name":"資料番号","attribute_value_mlt":[{"subitem_description":"資料番号: SA1000801000","subitem_description_type":"Other"}]},"item_7_publisher_9":{"attribute_name":"出版者（英）","attribute_value_mlt":[{"subitem_publisher":"Institute of Electrical and Electronics Engineers"},{"subitem_publisher":"Inc."}]},"item_7_relation_25":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_name":[{"subitem_relation_name_text":"info:doi/10.1109/TNS.2009.2020166"}],"subitem_relation_type_id":{"subitem_relation_type_id_text":"http://dx.doi.org/10.1109/TNS.2009.2020166","subitem_relation_type_select":"DOI"}}]},"item_7_source_id_21":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0018-9499","subitem_source_identifier_type":"ISSN"}]},"item_7_source_id_24":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA00667999","subitem_source_identifier_type":"NCID"}]},"item_7_text_6":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京大学"},{"subitem_text_value":"宇宙航空研究開発機構宇宙科学研究本部（JAXA) (ISAS) : 総合研究大学院大学"},{"subitem_text_value":"宇宙航空研究開発機構宇宙科学研究本部（JAXA) (ISAS) : 総合研究大学院大学"},{"subitem_text_value":"総合研究大学院大学"},{"subitem_text_value":"宇宙航空研究開発機構宇宙科学研究本部（JAXA) (ISAS) : 東京大学"},{"subitem_text_value":"宇宙航空研究開発機構宇宙科学研究本部（JAXA) (ISAS) : 総合研究大学院大学"},{"subitem_text_value":"日本原子力研究開発機構"},{"subitem_text_value":"日本原子力研究開発機構"},{"subitem_text_value":"日本原子力研究開発機構"}]},"item_7_text_7":{"attribute_name":"著者所属（英）","attribute_value_mlt":[{"subitem_text_language":"en","subitem_text_value":"Department of Electronic Engineering, School of Engineering, The University of Tokyo"},{"subitem_text_language":"en","subitem_text_value":"Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Graduate University for Advanced Studies"},{"subitem_text_language":"en","subitem_text_value":"Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Graduate University for Advanced Studies"},{"subitem_text_language":"en","subitem_text_value":"Graduate University for Advanced Studies"},{"subitem_text_language":"en","subitem_text_value":"Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Department of Electronics Engineering, School of Engineering, The University of Tokyo"},{"subitem_text_language":"en","subitem_text_value":"Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Graduate University for Advanced Studies"},{"subitem_text_language":"en","subitem_text_value":"Japan Atomic Energy Agency"},{"subitem_text_language":"en","subitem_text_value":"Japan Atomic Energy Agency"},{"subitem_text_language":"en","subitem_text_value":"Japan Atomic Energy Agency"}]},"item_access_right":{"attribute_name":"アクセス権","attribute_value_mlt":[{"subitem_access_right":"metadata only access","subitem_access_right_uri":"http://purl.org/coar/access_right/c_14cb"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"柳川, 善光"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小林, 大輔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"廣瀬, 和之"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"牧野, 高紘"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"齋藤, 宏文"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"池田, 博一"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小野田, 忍"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"平尾, 敏雄"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"大島, 武"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yanagawa, Y.","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kobayashi, Daisuke","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hirose, Kazuyuki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Makino, T.","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Saito, Hirobumi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Ikeda, Hirokazu","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Onoda, S.","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hirao, T.","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Ohshima, T.","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Experimental verification of scan-architecture-based evaluation technique of SET and SEU soft-error rates at each flip-flop in logic VLSI systems","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Experimental verification of scan-architecture-based evaluation technique of SET and SEU soft-error rates at each flip-flop in logic VLSI systems","subitem_title_language":"en"}]},"item_type_id":"7","owner":"1","path":["1888"],"pubdate":{"attribute_name":"公開日","attribute_value":"2015-03-26"},"publish_date":"2015-03-26","publish_status":"0","recid":"24117","relation_version_is_last":true,"title":["Experimental verification of scan-architecture-based evaluation technique of SET and SEU soft-error rates at each flip-flop in logic VLSI systems"],"weko_creator_id":"1","weko_shared_id":-1},"updated":"2023-06-21T02:56:01.329877+00:00"}