{"created":"2023-06-20T14:37:06.049828+00:00","id":3486,"links":{},"metadata":{"_buckets":{"deposit":"10a463aa-a4c9-4197-a0bf-851c10f89f89"},"_deposit":{"created_by":1,"id":"3486","owners":[1],"pid":{"revision_id":0,"type":"depid","value":"3486"},"status":"published"},"_oai":{"id":"oai:jaxa.repo.nii.ac.jp:00003486","sets":["1398:1530:1533","1543:1874:1877","1887:1891","9:789:817:1980"]},"author_link":["13871","13866","13870","13868","13867","13869"],"item_5_alternative_title_2":{"attribute_name":"その他のタイトル（英）","attribute_value_mlt":[{"subitem_alternative_title":"Study on speed-up algorithms of stencil programs for low memory bandwidth CPUs"}]},"item_5_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2016-12-27","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"106","bibliographicPageStart":"101","bibliographicVolumeNumber":"JAXA-SP-16-007","bibliographic_titles":[{"bibliographic_title":"宇宙航空研究開発機構特別資料: 第48回流体力学講演会/第34回航空宇宙数値シミュレーション技術シンポジウム論文集"},{"bibliographic_title":"JAXA Special Publication: Proceedings of the 48th Fluid Dynamics Conference / the 34th Aerospace Numerical Simulation Symposium","bibliographic_titleLang":"en"}]}]},"item_5_description_14":{"attribute_name":"会議概要（会議名, 開催地, 会期, 主催者等）","attribute_value_mlt":[{"subitem_description":"第48回流体力学講演会/第34回航空宇宙数値シミュレーション技術シンポジウム (2016年7月6日-8日. 金沢歌劇座), 金沢市, 石川","subitem_description_type":"Other"}]},"item_5_description_15":{"attribute_name":"会議概要（会議名, 開催地, 会期, 主催者等）（英）","attribute_value_mlt":[{"subitem_description":"48th Fluid Dynamics Conference /the 34th Aerospace Numerical Simulation Symposium (July 6-8, 2016. The Kanazawa Theatre), Kanazawa, Ishikawa, Japan","subitem_description_type":"Other"}]},"item_5_description_17":{"attribute_name":"抄録（英）","attribute_value_mlt":[{"subitem_description":"Stencil programs, which are mainly used for numerical simulations of continuum dynamics like fluid mechanics, require relatively high memory bandwidth of CPUs. On the other hand, current supercomputers have relatively low memory bandwidth compared to high computational performance of CPUs. It is called a memory wall problem, namely low B/F (Bytes/s per FLOP/s, FLoating OPeration/s) ratio. This paper makes a study on how to increase computational performance of stencil programs on current CPUs whose memory bandwidth is relatively lower. A practical methodology, which can enhance the computational performance, is proposed according to a study of a basic performance of SORA-MA (JAXA's new supercomputer) by a basic benchmark program. This methodology is applied to an actual stencil program, showing an improvement of computational performance by using characteristics of SORA-MA.","subitem_description_type":"Other"}]},"item_5_description_18":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"形態: カラー図版あり","subitem_description_type":"Other"}]},"item_5_description_19":{"attribute_name":"内容記述（英）","attribute_value_mlt":[{"subitem_description":"Physical characteristics: Original contains color illustrations","subitem_description_type":"Other"}]},"item_5_description_32":{"attribute_name":"資料番号","attribute_value_mlt":[{"subitem_description":"資料番号: AA1630031011","subitem_description_type":"Other"}]},"item_5_description_33":{"attribute_name":"レポート番号","attribute_value_mlt":[{"subitem_description":"レポート番号: JAXA-SP-16-007","subitem_description_type":"Other"}]},"item_5_publisher_8":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"宇宙航空研究開発機構(JAXA)"}]},"item_5_publisher_9":{"attribute_name":"出版者（英）","attribute_value_mlt":[{"subitem_publisher":"Japan Aerospace Exploration Agency (JAXA)"}]},"item_5_source_id_21":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1349-113X","subitem_source_identifier_type":"ISSN"}]},"item_5_source_id_24":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11984031","subitem_source_identifier_type":"NCID"}]},"item_5_text_6":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"宇宙航空研究開発機構(JAXA)"},{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"富士通株式会社"}]},"item_5_text_7":{"attribute_name":"著者所属（英）","attribute_value_mlt":[{"subitem_text_language":"en","subitem_text_value":"Japan Aerospace Exploration Agency (JAXA)"},{"subitem_text_language":"en","subitem_text_value":"Fujitsu Limited"},{"subitem_text_language":"en","subitem_text_value":"Fujitsu Limited"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"高木, 亮治"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"杉崎, 由典"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"鈴木, 清文"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takaki, Ryoji","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Sugisaki, Yoshinori","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Suzuki, Kiyofumi","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-01-15"}],"displaytype":"detail","filename":"AA1630031011.pdf","filesize":[{"value":"1.2 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"AA1630031011.pdf","url":"https://jaxa.repo.nii.ac.jp/record/3486/files/AA1630031011.pdf"},"version_id":"97b9d3ef-6492-4726-b797-bd7ffda520c0"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"conference paper","resourceuri":"http://purl.org/coar/resource_type/c_5794"}]},"item_title":"ステンシル系プログラムの低メモリバンド幅CPU 向け高速化手法の検討","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"ステンシル系プログラムの低メモリバンド幅CPU 向け高速化手法の検討"}]},"item_type_id":"5","owner":"1","path":["1533","1877","1891","1980"],"pubdate":{"attribute_name":"公開日","attribute_value":"2017-01-13"},"publish_date":"2017-01-13","publish_status":"0","recid":"3486","relation_version_is_last":true,"title":["ステンシル系プログラムの低メモリバンド幅CPU 向け高速化手法の検討"],"weko_creator_id":"1","weko_shared_id":-1},"updated":"2023-06-21T09:01:09.132634+00:00"}