@inproceedings{oai:jaxa.repo.nii.ac.jp:00038669,
 author = {土屋, 佑太 and 山田, 理子 and 水田, 栄一 and 坂本, 敬太 and 新藤, 浩之 and 鈴木, 浩一 and Tsuchiya, Yuta and Yamada, Noriko and Mizuta, Eiichi and Sakamoto, Keita and Shindo, Hiroyuki and Suzuki, Koichi},
 book = {第58回宇宙科学技術連合講演会講演集, Proceedings of 58th Space Sciences and Technology Conference},
 month = {Nov},
 note = {第58回宇宙科学技術連合講演会（2014年11月12日-15日. 長崎ブリックホール), 長崎市, 長崎県, SOI-EPGA In-orbit demonstaration Equipment(SOFIE) on board ALOS-2 was launched on May 24, 2014. The purpose of the mission is to demonstrate an SOI-EPGA and JAXA qualified EEE parts so that we promote the use of them. The SOI-EPGA under development by CNES/Atmel and JAXA/HIREC is reconfigurable SRAM type and has 450k gates with SOI(Silicon on Insulator) technology. To confirm the behavior of the SOI-EPGA, we prepare an evaluation circuit including SEU(Single Event Upset) detection. At present, we performed the validation of all electrical parts. This paper reports the first detailed evalution of the SOI-FPGA, JAXA, qualified EEE parts: MPU(HR5000S), Burst SRAM, POL, and MEMS gyroscope(consumer product) as a source of SOI-FPGA date processing., 資料番号: AC1500028000, レポート番号: JSASS-2014-4116},
 publisher = {日本航空宇宙学会(JSASS), The Japan Society for Aeronautical and Space Sciences (JSASS)},
 title = {SOI-FPGA軌道実証評価装置(SOFIE)の詳細評価結果},
 year = {2014}
}