@inproceedings{oai:jaxa.repo.nii.ac.jp:00004323,
 author = {Hoshino, Eijiro and Kobayashi, Daisuke and Makino, Takahiro and Ohshima, Takeshi and Hirose, Kazuyuki and Hoshino, Eijiro and Kobayashi, Daisuke and Makino, Takahiro and Ohshima, Takeshi and Hirose, Kazuyuki},
 book = {宇宙航空研究開発機構特別資料, JAXA Special Publication},
 month = {Mar},
 note = {Single event effects on phase locked loops (PLLs) are experimentally investigated. Test chips of the PLLs are fabricated in a 0.2micro-m fully-depleted silicon-on-insulator technology. The PLL architecture is designed in conjunction with hardening techniques such as the triple modular redundancy and a stacked transistor design approach. A heavy-ion beam test confirms that the hardened PLL exhibits higher radiation tolerance than non-hardened one for 7.5-MeV Ne irradiation: The accelerated ions have the linear energy transfer of 7.3 MeV・ cm2/mg in Si., 形態: カラー図版あり, Physical characteristics: Original contains color illustrations, 資料番号: AA0061889029, レポート番号: JAXA-SP-12-008E},
 pages = {134--137},
 publisher = {宇宙航空研究開発機構(JAXA), Japan Aerospace Exploration Agency (JAXA)},
 title = {Experimental study on radiation tolerance of SOI-PLLs},
 volume = {JAXA-SP-12-008E},
 year = {2013}
}