@techreport{oai:jaxa.repo.nii.ac.jp:00043299,
 author = {原田, 公一 and Harada, Koichi},
 month = {Dec},
 note = {A simulation program for a parallel computer configured with 128 by 256 processing elements was implemented on the Numerical Simulator in the National Aerospace Laboratory. It simulates the memory access and register operations at the clock level and generates time charts along with operation results. This paper describes the evaluation method for the parallel computer by use of a basic function subroutine, examines the instruction set and the network between the memories and the processing elements and as a result, estimates the maximum efficiency., 資料番号: NALSP0009008, レポート番号: NAL SP-9},
 title = {並列計算機のシミュレーション},
 year = {1988}
}